-> un netlisteur pour Spice3 : Tspi3nl
the netlistor go down the circuit hierarchy until it find
a property that define this symbol as "primitive"
(property on Symbol Body)
==> No property primitive : it goes until no sheet was found
==> default property name for primitive : "SPICEMODEL"
==> you may use another property name : [property]
ex: "PMODEL"
the data that define "model","model
parameters" ....
should be the value of a property on Symbol Body:
==> name : "INST" ;
value : "component name"
ex of data:
"Q1"
"M1"
...................
==> name : "VALUE"
; value : "data..."
ex of data:
"gha55h90"
"'gha55h90 mult=2'"
...................
the data that define the "subckt","
subckt parameters" ....
should be the value of a property on Symbol Body:
==> generate a SUBCKT for SPICE
....
==> name : "INST" ;
value : "Subckt name"
ex of data:
"X1"
"xp1"
...................
==> name : "VALUE"
; value : "data..."
ex of data:
"PDIFF"
"'PDIFF parameters mult_=2'"
...................
you should have on Symbol pin : "PIN"
(pin name)
0.1.5 Exemple :
# TSED
# C_3 BODY_comp NOFixed Visible "inst"
"XP"
# C_3 BODY_comp Fixed Visible "VALUE"
"PDIFF"
# P_35 PIN_comp Fixed NOVisible "PIN"
"C2"
# P_35 PIN_comp Fixed NOVisible "PINTYPE"
"IO"
# P_38 PIN_comp Fixed NOVisible "PIN"
"EM"
# P_38 PIN_comp Fixed NOVisible "PINTYPE"
"IO"
# P_41 PIN_comp Fixed NOVisible "PIN"
"BA1"
# P_41 PIN_comp Fixed NOVisible "PINTYPE"
"IO"
# P_44 PIN_comp Fixed NOVisible "PIN"
"BA2"
# P_44 PIN_comp Fixed NOVisible "PINTYPE"
"IO"
# P_47 PIN_comp Fixed NOVisible "PIN"
"C1"
# P_47 PIN_comp Fixed NOVisible "PINTYPE"
"IO"
# STAtus PROperty Edit
-----------------------------
# * "diviecl"
# * "/XP1"
# * "pairediff/sheet.tm_1"
# .SUBCKT PDIFF (BA1,BA2,C1,C2,EM)
# * I_68
# VE (TAIL,EM) 0.6
# * I_106
# B1 (C1,TAIL) I=(0.5*I(VE))*(1.0+(tanh((v(BA1)-v(BA2))/0.052)))
# * I_256
# B2 (C2,TAIL) I=(0.5*I(VE))*(1.0-(tanh((v(BA1)-v(BA2))/0.052)))
# * I_153
# RBE1 (BA1,TAIL) 10meg
# * I_206
# RBE2 (TAIL,BA2) 10meg
# * I_238
# RCE2 (C2,TAIL) 100meg
# * I_247
# RCE1 (C1,TAIL) 100meg
# * I_265
# RGND (EM,0) 100meg
# * I_187
# CBC1 (BA1,C1) 0.1p
# * I_229
# CBC2 (BA2,C2) 0.1p
# .ENDS PDIFF
# *
# * I_58
# VDD (VDD,0) 3
# * I_148
# V1 (E1,0) 1.5 AC 1 PULSE(1,2,1n,1n,1n,10n,20n)
# * I_157
# V2 (E2,0) 1.5
# * I_252
# V4 (E4,0) 2.5
# * I_107
# IT1 (N_114,0) 1m
# * I_261
# IT2 (N_268,0) 1m
# * I_228
# RQ1 (VDD,Q1) 1k
# * I_243
# RQ2 (VDD,QB1) 1k
# * I_280
# RQ3 (VDD,Q2B) 1k
# * I_295
# RQ4 (VDD,Q2) 1k
# * I_605
# XP1 (Q2B,E4,VDD,Q1,N_328) PDIFF
# * I_619
# XP2 (E1,E2,N_328,N_315,N_114) PDIFF
# * I_633
# XP3 (E4,Q1,Q1,QB1,N_315) PDIFF
# * I_647
# XP4 (Q1,E4,Q2B,Q2,N_358) PDIFF
# * I_661
# XP5 (E2,E1,N_358,N_351,N_268) PDIFF
# * I_675
# XP6 (Q2,E4,Q2B,Q2,N_351) PDIFF
# *************************************
# * End of Netlist
# *************************************
# *
you may generate parameters data for SUBCKT :
property to add :
on SYMBOL : (using tsed)
==> "PARAMS" ; value
: ex: "W=10u L=2u"
( SWItches : Not_fixed Visible)
==> actual parameter value
==> the value could be change using tned
==> "PARDEF" ; value
: ex: "W=3u L=3u"
( SWItches : Not_fixed Visible)
==> default parameter value
property to update :
on INSTANCE : (using tned)
==> "PARAMS" ; value
: ex: "W=20u L=4u"
( SWItches : Not_fixed Visible)
==> actual parameter value
Exemple :
# * ""
# * "bascfin2"
# * "/XB"
# * "basc/sheet.tm_2"
# * "/XB/XNA1"
# *
# * symbol : "nand3"
# *C_3 BODY_comp NOFixed Visible "INST"
"XNA"
# *C_3 BODY_comp Fixed Visible "value"
"NAND3"
# *
# * "nand3/sheet.tm_1"
# .SUBCKT NAND3 (aln,alp,I1,I2,I3,O1)
# * I_163
# M4 (O1,I1,NET1,aln) MEKVN W=10u L=1u
# * I_176
# M5 (NET1,I2,NET2,aln) MEKVN W=10u L=1u
# * I_189
# M6 (NET2,I3,aln,aln) MEKVN W=10u L=1u
# * I_241
# M1 (O1,I1,alp,alp) MEKVP W=30u L=1u
# * I_258
# M2 (O1,I2,alp,alp) MEKVP W=30u L=1u
# * I_275
# M3 (O1,I3,alp,alp) MEKVP W=30u L=1u
# .ENDS NAND3
# *
# * "/XB/XI1"
# *
# * symbol : "inv"
# *C_3 BODY_comp NOFixed Visible "INST"
"XI"
# *C_3 BODY_comp Fixed Visible "value"
"INV"
# *C_3 BODY_comp NOFixed Visible "params"
"'W_=10u L_=3u'"
# *C_3 BODY_comp Fixed NOVisible "pardef"
"'W_=10u L_=3u'"
# *
# * "inv/sheet.tm_1"
# .SUBCKT INV (aln,alp,I1,O1) parameters W_=10u L_=3u
# * I_109
# M2 (O1,I1,aln,aln) MEKVN W=W_ L=L_
# * I_158
# M1 (O1,I1,alp,alp) MEKVP W=W_ L=L_
# .ENDS INV
# *
# * "/XB/XA3"
# *
# * symbol : "inv"
# *C_3 BODY_comp NOFixed Visible "INST"
"XA"
# *C_3 BODY_comp Fixed Visible "value"
"NAND2"
# *C_3 BODY_comp NOFixed Visible "params"
"'W_=10u L_=3u'"
# *C_3 BODY_comp Fixed NOVisible "pardef"
"'W_=10u L_=3u'"
# *
# * "nand2/sheet.tm_1"
# .SUBCKT NAND2 (aln,alp,I1,I2,O1) parameters W_=10u L_=3u
# * I_125
# M3 (O1,I1,NET1,aln) MEKVN W=W_ L=L_
# * I_143
# M4 (NET1,I2,aln,aln) MEKVN W=W_ L=L_
# * I_192
# M1 (O1,I2,alp,alp) MEKVP W=W_ L=L_
# * I_210
# M2 (O1,I1,alp,alp) MEKVP W=W_ L=L_
# .ENDS NAND2
# *
# * symbol : "basc"
# *C_3 BODY_comp NOFixed Visible "INST"
"Xbascule"
# *C_3 BODY_comp Fixed Visible "value"
"basc"
# *
# .SUBCKT basc (aln,alp,CLK,D,Q,QB)
# * I_128
# *I_128 INSTANCE : "nand3/symbol.tm_1"
# *I_128 I_BODY NOFixed Visible "INST" "XNA1"
# XNA1 (aln,alp,N_202,CLK,N_169,N_188) NAND3
# * I_416
# *I_416 INSTANCE : "inv/symbol.tm_2"
# *I_416 I_BODY NOFixed Visible "INST"
"XI1"
# *I_416 I_BODY NOFixed Visible "params"
"'W_=20u L_=2u'"
# *XI1 (aln,alp,N_184,QB) INV W_=20u L_=2u
# * I_429
# XI2 (aln,alp,N_177,Q) INV W_=20u L_=2u
# * I_484
# XA3 (aln,alp,N_169,N_202,N_164) NAND2 W_=20u L_=2u
# * I_499
# XA4 (aln,alp,N_177,N_169,N_184) NAND2 W_=20u L_=2u
# * I_514
# XA5 (aln,alp,N_188,N_184,N_177) NAND2 W_=20u L_=2u
# * I_529
# XA6 (aln,alp,CLK,N_164,N_169) NAND2 W_=20u L_=2u
# * I_544
# XA7 (aln,alp,D,N_188,N_202) NAND2 W_=20u L_=2u
# .ENDS basc
# *
# * I_33
# V (VDD,0) 5
# * I_46
# Va (clk,0) 0 ac 0 pulse 0 5 15u 1u 1u 10u 30u
# * I_59
# Vb (D,0) 0 ac 0 pulse 0 5 10u 1u 1u 10u 20u
# * I_242
# XB (0,VDD,clk,D,Q,QB) basc
# *************************************
# * End of Netlist
# *************************************
# *
-> un SPICE (Berkeley Spice3f5 : complété
/ très amélioré)
On utilise un netlisteur pour générer la netlist SPICE ( hiérarchique , très
rapide).
Pour la simulation analogique , on utilise une version fortement améliorée du
SPICE3F5 de Berkeley , en particulier :
-> nouvelles commandes : Nodesave, Icsave, Vary ....
-> Analyse : f( temp) , f( dev-parameter)
-> Analyse : 2 niveaux : ex: "DC @temp -30 130 2 @r1 100 200 10"
-> Process Block : paramètres de modèle fonction de paramètres de procédés
par des expressions algébriques complexes .
-> modèles standards complétés par des paramètres complémentaires: area, temp
...
-> modèles de philips inclus : Mextram 503,504 , MOS 902,903,11 , TPL500, MOS30......
-> Aide à la convergence des circuits : "set accuracy "
, Améliorations des limiteurs des modèles bipolaires et mos ....
-> Un gestionnaire de Schéma-Simulation PERL-TK (Xwindow) , facultatif ,
permet de contrôler l' édition de schéma ,les
fichiers auxiliaires de SPICE( netlist ....) , et lance SPICE , le tout grâce
à des boutons , menus , etc ..... .
-> possibilité d' exécuter des commandes,scripts TCL-TK
***********************************************************
SPICE , from ATELECAD (core from Berkeley Spice3f5_1)
Improved by J.C PERRAUD ( Caen France 1994-2005 )
***********************************************************
Main Changes from Spice3f5 ....
-> new "help"features :
To know what is really implemented in this spice binary :
=> exec :"help help" to see how to use the interactive help
=> exec :"help O" to see the implemented Options
=> exec :"help C" to see the implemented Commands
=> exec :"help M" to see the implemented Models
=> exec :"help D" to see the implemented DEvices
=> Miscellaneous bugs fixed in the front end :
-> when running the analysis
-> when running all plot && help features .
when using SPICE in interactive mode, you may
-> see signal(s) during TRAN(or DC) analysis, using "IPLOT"
-> interupt TRAN(or DC) analysis,
-> then plot any available signal using "PLOT"
-> restart TRAN, DC analysis using "RESUME"
-> more clean front end
-> no more case sensitive
-> missing commands in interactive mode added
ex -> NODESET , IC , INCLUDE
-> new commands
-> NODESAVE save node state for NODESET feature
-> ICSAVE save node state for IC feature
-> VARY allows Parameters variation :
-> DC , AC : ex: coupled parameters ...
-> TRANSIENT : ex: can use the parameters time , temp , node state, @dev[param] .... etc in the expression.
-> Arbitrary Source : can use the parameters time, temp, node state, @dev[param] .... etc in the expression.
-> HP laser IIIP "PCL5" driver added (by default).
-> 2 Levels of Analysis for DC , but now you can swept also parameters as TEMP , Device Parameters as R1[TEMP] ...
ex: DC temp -40 130 2 @R1[resistance] 100 500 10 ...
or: DC temp -40 130 2 @R1 100 500 10 ...
( VS is compatible with 2 Levels plots )
-> 2 Levels of Analysis (as for DC ) for AC , NOISE , SENS , TF
-> 2 Levels of Analysis create true 2 dimensions vectors
-> Warning is given if OP ( DC operating point) is DC UNSTABLE .
-> SHOW , SAVE : parameters usage modifications
-> Circuit can be changed in Interactive Mode :
-> to Update a Circuit Component Line
-> to Add a new Circuit Component Line using "CIRCUIT" command .
-> Fourier analysis :
-> batch : nb harmonic setting using '.OPTIONS nfreqs=15'
-> Interactive:
-> nb harmonic setting using 'set nfreqs=15'
-> plot curve added
-> Added new models:
-> EKV-EPFL 2.4,2.6 Mos : from 07-12-97 (EPFL Lausanne)
-> Philips Capacitance + Diode : Juncap(for Philips Mos)
-> Philips Mos : Mos902, Mos903, Mos30, Mos3002, Mos1101, Mos1102
-> Philips Bipolar : TPL500 , Mextram (TNS503,TPS503),(TNS504,TPS504)
-> Mos BSIM3 : Version 3.3
-> Mos BSIM4 : Version 1.1
-> AC current is now directly available in AC Analysis for the following models:
-> Simple : Resistance,Capacitance,Inductance .
-> Bipolar : BJT BJT2 TNS503 TPS503 TNS504 TPS504,HICUM models
-> Mos : Mos902, Mos903, EKV2.4, EKV2.6
-> can handle parameters : to , into SUBCKT
( with parameter algebric expression possibility in "{expression}" )
-> Added parameters : "AREA" to:
-> resistor model
-> capacitor model
-> inductor model
(so allowing simple SUBCKT multiple factor)
-> Added new parameters to :
-> resistor model : kf,af (Flicker Noise)
-> capacitor model :tc1,tc2,vc1,vc2(Varicap)
-> capacitor , Inductor device : dlc (energy difference from time=0)
-> You may use "SET accuracy = (0 , 1 , 2) (to redefine the abstol,vntol,reltol directly)
-> You may use some directories for implicit loading of Models && Subckt with their parameters ...
(using the new command "Process" )
-> Added new postprocessing functions :
peak(out) , top(out), hper(out), freq(out)
integ(out), minteg(out), msqrlin (out), msqrexp(out),
msqrlexp(out), msqrecos(out) , round(out), trunc(out) ,
max(out), min(out) ,vmax(out), vmin(out) .
-> Added "XP" "XPLOT" "XPRINT" command to plot or print
vectors using a simple button menu tool .
-> Added a "pipe like" mechanism command for some command
plot, print,.... allowing to exec an external UNIX command
command and get back their results for define the spice
command options (TCLTK menu ...etc).
-> Improved FRONT END :
-> Added a command recall history via Arrow keys ...
-> Command completion ( using "partname+ESC")
-> File conpletion ( using "partname+ESC")
-> Vector Name completion ( using "cmd partname+ESC")
-> List of Commands ( using "partname+CNTL-D")
-> List of Vectors ( using "cmd partname+CNTL-D")
-> Variable and string processing :
-> index on 1 dim variable : give the char at position
-> range on 1 dim variable : give range of char
-> variables may be concatened
-> strcmp and strncmp to compare string
-> vectors or variables can be use as indexes
-> Data Results Redirection in file : ( using ">" or ">>")
available for the following commands:
"help..." , "show..." , "showmod..." ,
"listing..." , "echo..."
-> Added a "DEVUIC" parameter to TRAN to allows to setup
Initial condition on Capaciatances,Inductors , while
do an DC op before to init the node voltages ...
( improvement regarding the starting initialisation
of devices when using UIC , or DEVUIC
-> New command "nodeinfo" : info using node number .
-> Compute the sum of energy in all Capacitors and
Inductors ( using "set doetlc" , "save all @etlc",
plot @etlc ) to see more easyly if you have got
the steady state in Transient Analysis .
-> List of Devices used in variable : "DEVS"
-> List of Models used in variable : "MODS"
-> List of Vectors used in circuit : "VECTORS"
-> Added a PROCESS BLOCK capability : (see the exemples)
==================================
You may define Model parameter value as a function of
some Process parameters values ...
So the Spice model library may be defined as function
of some Process parameters and devices dimensions .
-> ".set" available now in circuit file to set
for instance process parameters
-> ".define" available now in circuit file to
set for instance Function of process
parameters
-> ".expand" reload the circuit allowing using
NEW process parameters and previous
process Function
-> "{expression}" : you may now use algebric expression
to define DEVICE or MODEL PARAMETERS ,
It may contain :
-> Constantes & Variables (using ".set")
-> Standard functions
-> Defined functions ( using ".define" )
-> Dynamic Share Lib Spice Model libraries :
========================================
Added a Dynamic Share Lib mechanism to load libraries
directly witten in C compatible to speed up processing :
-> for Spice functions (so replacing those written using
"define" spice command .
-> for generate complete SET + DEFINE +SUBCKT libraries.
(see commands : "getshlib" , "convsckt2c" )
-> Schematic Driven Ploting or Printing :
=====================================
-> use tned as Schematic Driven tool (see Give tned command).
-> see Interactive spice command "waitfor"
-> Schematic Driven Spice Analysis ....:
=====================================
-> use tned as Schematic Driven tool (see SEND tned command).
>
-> see Interactive spice command "WaitFor"
>
-> see Interactive Tned menu "tnedMenuDB" (TclTk)
-> Improve the Automatic DC convergence methods
=============================================
-> new Analysis : "OPN" ... new way to get convergency for OP
see:"convergence" or Interactive spice command:"OP","OPN"
-> Added new RF Analysis : (Harmonic Balance)
======================
they simulates a circuit in the frequency domain to find its behaviour (steady state or transient ).
they simulates forced periodic and almost-periodicsystems, and so is useful for such circuits
as amplifiers, filters, attenuators, detectors, multipliers, and mixers,
but it cannot handle yet oscillators.
-> PORT : model of a resistive Voltage Source
-> NPORT : model that can read files containing lists of S-parameters
versus frequency for an N-port
-> SP Analysis: S-PARAMETER Analysis .
-> HB Analysis: Harmonic Balance 1forced frequency Steady State Analysis .
-> QP Analysis: Harmonic Balance Quasi Periodic 2 forced frequencies
Steady State Analysis
-> CE Analysis: Harmonic Balance Circuit Envelope 2 forced frequencies
Transient Time domain Analysis ( for Circuit Waveform )
that may use PULSE , SINE , COSINE on other Sources
-> Added new SPICE model :
=======================
-> BJT : HICUM 212 : HICUM level 2.1 : with Self heating / 4 ext Nodes
-> BJT : HICUM 2125 : HICUM level 2.1 : with Self heating / 5 ext Nodes
-> New SPICE Verilog A compiler :
=======================
-> to generate from Verilog Source code all the needed C files needed
to implement in this SPICE the new model ...
-> SPICE Analysis supported by this Verilog A compiler :
=> OP , OPN , DC
=> AC , PZ
=> TRAN
=> Harmonic Balance : HB , QP, CE
-> Added new SPICE model Verilog A compiler:
========================================
-> used to include new HICUM model 213 : level 2.1 from Verilog A
-> used to include new HICUM model 203 : level 0 from Verilog A
-> new SPICE model version using Verilog A compiler :
=================================================
-> Mos EKV 2.4 ( Verilog A converted from C code - 17 Oct 96 )
